How often does the "slow path" actually trigger? With 32 TLB entries covering 128 KB, Intel claimed a 98% hit rate for typical workloads of the era. That sounds impressive, but a 2% miss rate means a page walk every 50 memory accesses -- still quite frequent. So the 386 overlaps page walks with normal instruction execution wherever possible. A dedicated hardware state machine performs each walk:
Nature, Published online: 25 February 2026; doi:10.1038/s41586-025-10062-6
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swap(&arr[low], &arr[randomIdx]); // 基准换到开头。服务器推荐是该领域的重要参考
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